Probes and probe arrangements for making temporary electrical contact to devices or circuits under test have been in widespread use for many years. Accordingly, many aspects of this technology have been developed. Although much of this technological development has focused on details pertaining to the probes, other aspects of probe technology have also been considered. More specifically, probes are typically attached to a probe card, or some other form of substrate, and some work has focused on improvements relating to the probe card/substrate.
For example, in U.S. Pat. No. 6,881,974, a probe card manufacturing approach which starts by forming blind holes in a substrate and filling these holes with an electrically conductive metal is considered. After subsequent processing, part of the metal in the blind holes is exposed to form the probe pins. In U.S. Pat. No. 6,259,261, a probe assembly is considered where a selector card can be employed to determine the pin pattern of the probing card. In U.S. Pat. No. 6,566,898, a multi-layer probe card substrate having an improved thermal expansion match to silicon is considered. In U.S. Pat. No. 6,586,955, a probe assembly having cavities filled with a low melting point metal, which are individually electrically connected to probe tips, is considered. By including a molten or near-molten metal section in each probe, metal fatigue in the probes can be alleviated, and cracking can be avoided or rendered less harmful by self-healing.
However, as integrated circuit technology continues to develop, it is necessary to probe at increasingly fine probe pitch (i.e., reduced probe spacing). This evolution can generate problems that have not apparently arisen in connection with electrical probing before, and which require new solutions.